1. Field of the Invention
The present invention relates to a chip module with a chip carrier and at least one chip, wherein the chip carrier is designed as a sheet with a carrier layer of plastics material and a conductor path structure with conductor paths, and the chip carrier is connected to the chip with interposition of a filling material, wherein the conductor paths are connected on their front to attachment faces of the chip and have, on their rear, external bonding regions for forming a flatly distributed attachment face arrangement for connection of the chip module to an electronic component or a substrate. The invention also relates to a process for producing such a chip module.
Chip modules of the above-mentioned type are used, for example, to allow a flatly distributed less dense attachment face arrangement for connecting the chip to a board or the like by conventional SMT (surface mounted technology) starting from the very dense peripheral attachment face arrangement of a chip via the chip carrier provided with a conductor path structure. Sufficiently great spacing between the individual attachment faces of the attachment face arrangement has proven particularly important, in particular, because the external attachment face arrangement is generally connected to the board or the like by a reflow process. If the space between the individual attachment faces is too small, short-circuit connections between individual solder bumps of the attachment face arrangement can arise.
Owing to the increasing demand for miniaturisation of chip modules, chip modules described as "CSP" (chip size package or also chip scale package) have been developed on the basis of so-called "BGA" (ball grid array) attachment face distributions. In contrast to the above-mentioned BGAs in which the flat redistribution of the chip attachment faces over a surface area which is substantially greater than the chip surface is effected by means of correspondingly great chip carriers, an area which substantially coincides with the surface of the chip is available for the chip carrier in the chip modules designated by CSP. It has therefore proven important with the CSPs to utilise the available area as well as possible.
2. Description of the Related Art
In known CSPs, of the type known, for example, from U.S. Pat. No. 5,367,763 or from "Proceedings of the 1993 International Symposium on Microelectronics (ISHM), Dallas, Tex., pages 318-323", the edge region of the area available for the chip carrier and congruent with the surface, for the attachment connections between the attachment faces of the chip and the conductor path structure of the chip carrier is used up so the chip carrier extends only in an internal surface region reduced by the edge region. It is therefore necessary with chip modules of this design to provide the periphery of the chip surface with a separate covering, for example a casting compound, in a subsequent stage of operation in order to achieve a complete housing which also covers the attachment faces of the chip in an insulating manner.
It is accordingly the object of the present invention to propose a chip module and a process for producing a chip module which allow better utilisation of the chip surface available for the arrangement of the chip carrier, the construction of the chip module at the same time being as simple as possible.